Integrated circuits often include flip-flops for storing state within the circuit. A master-slave flip-flop circuit may include a master latch which stores a master signal which is dependent on an input signal to the flip-flop, and a slave latch which stores a slave signal which switches in dependence on the master signal in the master latch. The output of the flip-flop is dependent on the slave signal. The master latch and slave latch are clocked so that the master latch captures its master signal in a first phase of a clock signal and the slave latch captures its slave signal in a second phase of the clock signal. It is desirable to reduce the amount of power consumed by the master-slave flip-flop circuit.